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石英晶體振蕩器
- 編號：9023093
- 頻率：125MHz
- 尺寸：20.8x13.1x5.08mm
CMOS時鐘振蕩器,CPPLC1LTA7BP125.0TS,卡迪納爾石英晶振
CMOS時鐘振蕩器,CPPLC1LTA7BP125.0TS,卡迪納爾石英晶振，美國進口晶振，Cardinal卡迪納爾晶振CPPL1系列，編碼為CPPLLTA7BP125.0CTS，尺寸為：20.8x13.1x5.08mm金屬扣封裝，頻率為：125.000MHz，石英晶振，石英晶體振蕩...
CMOS時鐘振蕩器,CPPLC1LTA7BP125.0TS,卡迪納爾石英晶振，美國進口晶振，Cardinal卡迪納爾晶振CPPL1系列，編碼為CPPLC1LTA7BP125.0TS，尺寸為：20.8 x 13.1 x 5.08mm金屬扣封裝，頻率為：125.000MHz，石英晶振，石英晶體振蕩器，CMOS輸出（將與TTL設備接口）啟用/禁用功能（可選備用功能）3.3V標稱電源電壓全DIP14封裝工廠編程，應用于：驅動A/D，D/As，FPGAs，數字視頻以太網，GbE醫療，存儲區域，網絡COTS寬帶接入，超聲波/SDH/DWDM，測試和測量。
CMOS時鐘振蕩器,CPPLC1LTA7BP125.0TS,卡迪納爾石英晶振，參數表
| Electrical Characteristics CPPL1 | |||||||
| Parameter | Min | Typ | Max | Unit | Condition | ||
| Frequency Range | 125 | MHz | (3.3V : 1-100MHz) | ||||
| Frequency Stability | 2 | ±25 | - | ±100 | ppm | For all supply voltages, load changes, aging for 1 year at 25°C ± 2°C, shock, vibration and temperatures. | |
| 0 | - | 70 | |||||
| Operating Temperature Range options | 2 | -20 | - | 70 | °C | ||
| -40 | - | 85 | |||||
| Supply Voltage 1, 2 VDD | 2.97 | - | 5.5 | V | See Part Number options on page 2 | ||
| Supply Current IDD (No Load) | - | - | 45 | mA | VDD = 5.0V | ||
| 25 | VDD = 3.3V | ||||||
| Cload = 50pF max, VDD = 4.5~5.5V, ≤ 66MHz | |||||||
| Output Type | CMOS | Cload = 25pF max, VDD = 4.5~5.5V, > 66MHz | |||||
| Cload = 30pF max, VDD = 2.97~3.63V, ≤ 40MHz | |||||||
| Cload = 15pF max, VDD = 2.97~3.63V, > 40MHz | |||||||
| TTL | Cload = 50pF max; VDD = 4.5~5.5V, ≤ 40MHz | ||||||
| Duty Cycle | - | - | - | % | See Page 2 | ||
| Output VOH (TTL Level) | 2.4 | - | - | V | VDD = 4.5~5.5V | ||
| (CMOS Level) | VDD - 0.4 | V | All voltages | ||||
| Output VOL | - | - | 0.4 | V | See Load Circuit and waveform page | ||
| Output TRISE and TFALL | - | - | - | ns | See page 2 | ||
| Startup Time | - | - | 2 | ms | Time for output to reach specified frequency | ||
| VDISABLE | - | - | 0.8 0.2VDD | VDD = 4.5~5.5V | |||
| V | VDD = 2.97~3.63V | ||||||
| VDD = 4.5~5.5V | |||||||
| VENABLE | 2.0 0.7VDD | - | VDD = 2.97~3.63V | ||||
| Enable Time | - | - | 2 | ms | |||
| Disable Time - Pin 1 low to Output Hi-Z | T/2 | T+10 | ns | T = Frequency Period | |||
| - | |||||||
| Disable Current | - | - | - | mA | Enable/Disable: Pad 1 low, output disabled; See above Supply Current | ||
| - | 0.4 | - | Standby option: Pad 1 low, output disabled, oscillator shutdown | ||||
| RMS Period Jitter | - | 8 | 11 | ps | |||
| Period Jitter, Pk-Pk | 65 | 99 | ps | >1,000,000 samples | |||
| 65 | 80 | ≤ 33MHz | |||||
| > 33MHz | |||||||
| Storage Temperature Range | -55 | - | 125 | °C | |||
CMOS時鐘振蕩器,CPPLC1LTA7BP125.0TS,卡迪納爾石英晶振，特征及應用
特征：
CMOS輸出（將與TTL設備接口）
•啟用/禁用功能（可選待機功能）
•3.3V或5.0V標稱電源電壓
•完整DIP14封裝
•工廠編程 石英晶振
應用于：
驅動A/D、D/A、FPGA
數字視頻
以太網，GbE
醫學的
存儲區域網絡
帆布床
寬帶接入
SONET/SDH/DWDM網絡
測試和測量
| 原廠編碼 | 品牌 | 系列 | 頻率 | Description描述 | Size / Dimension 尺寸 |
| CPPLC8-A7B6-32.0TS | Cardinal晶振 | FIPO™ CPPL | 32MHz | OSC XO 32.000MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLC8-A7BP-14.7456TS | Cardinal晶振 | FIPO™ CPPL | 14.7456MHz | OSC XO 14.7456MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLC8L-B6-45.0TS | Cardinal晶振 | FIPO™ CPPL | 45MHz | OSC XO 45.000MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLC8LZ-A7BP-40.0TS | Cardinal晶振 | FIPO™ CPPL | 40MHz | OSC XO 40.000MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLC8Z-A7BP-56.448TS | Cardinal晶振 | FIPO™ CPPL | 56.448MHz | OSC XO 56.448MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLC8LZ-A5BP-25.0TS | Cardinal晶振 | FIPO™ CPPL | 25MHz | OSC XO 25.000MHZ CMOS SMD | 0.571" L x 0.346" W (14.50mm x 8.80mm) |
| CPPLT4L-A7BR-100.0PD | Cardinal晶振 | FIPO™ CPPL | 100MHz | OSC XO 100.000MHZ TTL PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLT4L-BR-83.0TS | Cardinal晶振 | FIPO™ CPPL | 83MHz | OSC XO 83.000MHZ TTL PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLC1-B6-24.0TS | Cardinal晶振 | FIPO™ CPPL | 24MHz | OSC XO 24.000MHZ CMOS PC PIN | 0.819" L x 0.520" W (20.80mm x 13.20mm) |
| CPPLC1-BP-155.52PD | Cardinal晶振 | FIPO™ CPPL | 155.52MHz | OSC XO 155.52MHZ CMOS PC PIN | 0.819" L x 0.520" W (20.80mm x 13.20mm) |
| CPPLC1L-A5BR-13.56TS | Cardinal晶振 | FIPO™ CPPL | 13.56MHz | OSC XO 13.56MHZ CMOS PC PIN | 0.819" L x 0.520" W (20.80mm x 13.20mm) |
| CPPLC4-B6-16.896TS | Cardinal晶振 | FIPO™ CPPL | 16.896MHz | OSC XO 16.896MHZ CMOS PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLC4-B6-3.6864TS | Cardinal晶振 | FIPO™ CPPL | 3.6864MHz | OSC XO 3.6864MHZ CMOS PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLC4L-B6-100.0TS | Cardinal晶振 | FIPO™ CPPL | 100MHz | OSC XO 100.000MHZ CMOS PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLC4L-BR-37.5TS | Cardinal晶振 | FIPO™ CPPL | 37.5MHz | OSC XO 37.50MHZ CMOS PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
| CPPLC4T-A7BR-10.6656TS | Cardinal晶振 | FIPO™ CPPL | 10.6656MHz | OSC XO 10.6656MHZ CMOS PC PIN | 0.520" L x 0.520" W (13.20mm x 13.20mm) |
深圳市康華爾電子有限公司SHENZHEN KONUAER ELECTRONICS CO.,LTD
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